; general device setup ; this is for the ATtiny 13 .NOLIST ; Disable listfile generation .include "tn13def.inc" .LIST ; note that the tn13def.inc was enriched with bit settings of the SREG register ; this program only sets a PLL in a mobile handset RF block. ; we want to use a block like this for wireless bass connection as these are ; current saving and should surpass ordinary wireless sets ; ; this is the receiver code ; uses the M54958 PLL chip .equ txfreq=34584 ; which is 886.0125 RX Mhz but no longer used, we have a table now .equ reffreq=128 ; = 12.5 Khz in 70cm band , doubled on final TX = 25 khz .equ maxchannel = 0x08 ; maximum channel number .equ nrefvalue = 0b11110000 ; Prog NRef & both PLL's off .equ pll2value = 0b10100000 ; PLL 2 Prog & PLL1 Off .equ pll1value = 0b01010000 ; PLL1 Prog. & PLL2 Off .equ blinktime = 0xA0 ; blinking interval for Channel indicator LED = Lock LED ; port usage .equ pllsi = 3 ;PB3 pin - data to PLL .equ pllcps = 4 ;PB4 pin - clock to PLL .equ pllrst = 2 ;PB2 pin - Reset (Latch) to PLL ; this pin will be switched to output for displaying channel number ; otherwise its used for lock detection .equ plllock = 0 ;PB0 pin - Lock input ( hi = unlocked) .equ button = 1 ; for channel increment button to ground ; register equates. We waste them here for holding all necessary data .def si_lo =r18 ;data to send , change as needed .def si_hi =r17 ; " .def temp =r16 ;misc usage, must be in upper regs for IMMED mode .def del =r19 ; delay register for woz' wait routine .def channel =r20 ; holds channel number (starting at 0) .def delee =r21 ; retry counter for setting PLL registers .def ledblink = r22 ; for LED blinker indicates channel ; these macros are stolen from SPI code fragment example ; ******** MACRO DEFINITIONS ****************************** .macro rst_active cbi portb,pllrst .endm .macro rst_inactive sbi portb,pllrst .endm .macro cps_hi sbi portb,pllcps .endm .macro cps_lo cbi portb,pllcps .endm .macro pllsi_hi sbi portb,pllsi .endm .macro pllsi_lo cbi portb,pllsi .endm .macro plllock_hi sbi portb,plllock .endm .macro plllock_lo cbi portb,plllock .endm .macro addi subi @0, -@1 ;subtract the negative of an immediate value .endm .macro set_delay ;set up the time delay amount, from 1 to 7 subi @0, (@1 << 5) ;NOTE: THIS shift affects INC macro (below)! .endm .macro inc_delay ;bump the delay counter subi @0, -(1 << 5) ;shift value here must be same as above! .endm ; ************** MAIN PROGRAM STARTS HERE ************************* .CSEG .ORG 0x0 rjmp RESET ; Reset Handler rjmp EXT_INT0 ; IRQ0 Handler rjmp PC_INT0 ; PCINT0 Handler rjmp TIM0_OVF ; Timer0 Overflow Handler rjmp EE_RDY ; EEPROM Ready Handler rjmp ANA_COMP ; Analog Comparator Handler rjmp TIM0_COMPA ; Timer0 CompareA Handler rjmp TIM0_COMPB ; Timer0 CompareB Handler rjmp WATCHDOG ; Watchdog Interrupt Handler rjmp ADC_INT ; ADC Conversion Handler ; EXT_INT0: RETI PC_INT0: bclr SREG_I ; disable irqs RETI TIM0_OVF: RETI EE_RDY: RETI ANA_COMP: RETI TIM0_COMPA: RETI TIM0_COMPB: RETI WATCHDOG: RETI ADC_INT: RETI RESET: cli ; first switch off the WD wdr in temp, MCUSR ; clr the WDRF bit andi temp, (0xff & (0<